module eSPI_uart (  /*autoarg*/
   // Outputs
   w_post_code, txd, espi_alert,
   // Inouts
   espi_data,
   // Inputs
   sys_rst_n, sys_clk, rxd, espi_rst_n, espi_cs, espi_clk
   ) ;

/*autoinout*/
// Beginning of automatic inouts (from unused autoinst inouts)
inout [3:0]		espi_data;		// To/From u_eSPI_slave of eSPI_slave.v
// End of automatics


/*autoinput*/
// Beginning of automatic inputs (from unused autoinst inputs)
input			espi_clk;		// To u_eSPI_slave of eSPI_slave.v
input			espi_cs;		// To u_eSPI_slave of eSPI_slave.v
input			espi_rst_n;		// To u_eSPI_slave of eSPI_slave.v
input			rxd;			// To u_uart of uart.v
input			sys_clk;		// To u_eSPI_slave of eSPI_slave.v
input			sys_rst_n;		// To u_eSPI_slave of eSPI_slave.v
// End of automatics

/*autooutput*/
// Beginning of automatic outputs (from unused autoinst outputs)
output			espi_alert;		// From u_eSPI_slave of eSPI_slave.v
output			txd;			// From u_uart of uart.v
output [7:0]		w_post_code;		// From u_spi2uart of spi2uart.v
// End of automatics


/*autowire*/
// Beginning of automatic wires (for undeclared instantiated-module outputs)
wire [63:0]		addr_to_ip;		// From u_spi2uart of spi2uart.v
wire [2:0]		addr_valid;		// From u_eSPI_slave of eSPI_slave.v
wire [63:0]		address;		// From u_eSPI_slave of eSPI_slave.v
wire [7:0]		code_to_ip;		// From u_spi2uart of spi2uart.v
wire [7:0]		command;		// From u_eSPI_slave of eSPI_slave.v
wire			command_valid;		// From u_eSPI_slave of eSPI_slave.v
wire [7:0]		cycle;			// From u_eSPI_slave of eSPI_slave.v
wire [7:0]		cycle_to_ip;		// From u_spi2uart of spi2uart.v
wire [7:0]		data_from_ip;		// From u_eSPI_slave of eSPI_slave.v
wire			data_req;		// From u_eSPI_slave of eSPI_slave.v
wire [7:0]		data_to_ip;		// From u_spi2uart of spi2uart.v
wire			data_valid;		// From u_eSPI_slave of eSPI_slave.v
wire [15:0]		error_data;		// From u_eSPI_slave of eSPI_slave.v
wire			error_en;		// From u_eSPI_slave of eSPI_slave.v
wire			hdr_valid;		// From u_eSPI_slave of eSPI_slave.v
wire [11:0]		length;			// From u_eSPI_slave of eSPI_slave.v
wire [11:0]		length_to_ip;		// From u_spi2uart of spi2uart.v
wire [7:0]		message_code;		// From u_eSPI_slave of eSPI_slave.v
wire [31:0]		message_specific;	// From u_eSPI_slave of eSPI_slave.v
wire			message_valid;		// From u_eSPI_slave of eSPI_slave.v
wire			response_defer;		// From u_spi2uart of spi2uart.v
wire			response_wait;		// From u_spi2uart of spi2uart.v
wire [7:0]		rx_data;		// From u_uart of uart.v
wire			rx_err;			// From u_uart of uart.v
wire			rx_vld;			// From u_uart of uart.v
wire [31:0]		specific_to_ip;		// From u_spi2uart of spi2uart.v
wire [1:0]		status_avail;		// From u_spi2uart of spi2uart.v
wire [3:0]		tag;			// From u_eSPI_slave of eSPI_slave.v
wire [3:0]		tag_to_ip;		// From u_spi2uart of spi2uart.v
wire [7:0]		tx_data;		// From u_spi2uart of spi2uart.v
wire			tx_en;			// From u_spi2uart of spi2uart.v
wire			tx_rdy;			// From u_uart of uart.v
// End of automatics



spi2uart u_spi2uart(
                    .rst			( ~sys_rst_n  ),
		    .clk		(sys_clk ),
		/*autoinst*/
		    // Outputs
		    .tx_en		(tx_en),
		    .tx_data		(tx_data[7:0]),
		    .w_post_code	(w_post_code[ 7:0]),
		    .response_wait	(response_wait),
		    .data_to_ip		(data_to_ip[7:0]),
		    .cycle_to_ip	(cycle_to_ip[7:0]),
		    .tag_to_ip		(tag_to_ip[3:0]),
		    .length_to_ip	(length_to_ip[11:0]),
		    .code_to_ip		(code_to_ip[7:0]),
		    .specific_to_ip	(specific_to_ip[31:0]),
		    .addr_to_ip		(addr_to_ip[63:0]),
		    .response_defer	(response_defer),
		    .status_avail	(status_avail[1:0]),
		    // Inputs
		    .tx_rdy		(tx_rdy),
		    .rx_vld		(rx_vld),
		    .rx_data		(rx_data[7:0]),
		    .rx_err		(rx_err),
		    .command_valid	(command_valid),
		    .command		(command[7:0]),
		    .error_en		(error_en),
		    .error_data		(error_data[15:0]),
		    .data_req		(data_req),
		    .data_valid		(data_valid),
		    .data_from_ip	(data_from_ip[7:0]),
		    .addr_valid		(addr_valid[2:0]),
		    .address		(address[63:0]),
		    .hdr_valid		(hdr_valid),
		    .cycle		(cycle[7:0]),
		    .tag		(tag[3:0]),
		    .length		(length[11:0]),
		    .message_valid	(message_valid),
		    .message_code	(message_code[7:0]),
		    .message_specific	(message_specific[31:0]));


eSPI_slave  u_eSPI_slave(
/*autoinst*/
			 // Outputs
			 .espi_alert		(espi_alert),
			 .addr_valid		(addr_valid[2:0]),
			 .address		(address[63:0]),
			 .hdr_valid		(hdr_valid),
			 .cycle			(cycle[7:0]),
			 .tag			(tag[3:0]),
			 .length		(length[11:0]),
			 .message_valid		(message_valid),
			 .message_code		(message_code[7:0]),
			 .message_specific	(message_specific[31:0]),
			 .command_valid		(command_valid),
			 .command		(command[7:0]),
			 .error_en		(error_en),
			 .error_data		(error_data[15:0]),
			 .data_req		(data_req),
			 .data_valid		(data_valid),
			 .data_from_ip		(data_from_ip[7:0]),
			 // Inouts
			 .espi_data		(espi_data[3:0]),
			 // Inputs
			 .sys_clk		(sys_clk),
			 .sys_rst_n		(sys_rst_n),
			 .espi_rst_n		(espi_rst_n),
			 .espi_clk		(espi_clk),
			 .espi_cs		(espi_cs),
			 .cycle_to_ip		(cycle_to_ip[7:0]),
			 .tag_to_ip		(tag_to_ip[3:0]),
			 .length_to_ip		(length_to_ip[11:0]),
			 .code_to_ip		(code_to_ip[7:0]),
			 .specific_to_ip	(specific_to_ip[31:0]),
			 .addr_to_ip		(addr_to_ip[63:0]),
			 .response_defer	(response_defer),
			 .status_avail		(status_avail[1:0]),
			 .data_to_ip		(data_to_ip[7:0]),
			 .response_wait		(response_wait));





uart  u_uart(
             .rst			( ~sys_rst_n  ),
	     .clk		(sys_clk ),
	     /*autoinst*/
	     // Outputs
	     .tx_rdy			(tx_rdy),
	     .rx_vld			(rx_vld),
	     .rx_data			(rx_data[7:0]),
	     .rx_err			(rx_err),
	     .txd			(txd),
	     // Inputs
	     .tx_en			(tx_en),
	     .tx_data			(tx_data[7:0]),
	     .rxd			(rxd));

endmodule

